PART FOUR THE CENTRAL PROCESSING UNIT CHAPTER INSTRUCTION SETS: CHARACTERISTICS AND FUNCTIONS 12.1 Machine Instruction Characteristics Elements of a Machine Instruction Instruction Representation Instruction Types Number of Addresses Instruction Set Design 12.2 Types of Operands Numbers Characters Logical Data 12.3 Intel x86 and ARM Data Types x86 Data Types ARM Data Types 12.4 Types of Operations Data Transfer Arithmetic Logical Conversion Input/Output System Control Transfer of Control 12.5 Intel x86 and ARM Operation Types x86 Operation Types ARM Operation Types 12.7 Key Terms, Review Questions, and Problems Appendix 12A Little-, Big-, and Bi-Endian 405 406 CHAPTER 12 / INSTRUCTION SETS: CHARACTERISTICS AND FUNCTIONS LEARNING OBJECTIVES After studying this chapter, you should be able to: Present an overview of essential characteristics of machine instructions. Describe the types of operands used in typical machine instruction sets. Present an overview of x86 and ARM data types. Describe the types of operands supported by typical machine instruction sets.
Present an overview of x86 and ARM operation types. Understand the differences among big endian, little endian, and bi-endian. Much of what is discussed in this book is not readily apparent to the user or programmer of a computer. If a programmer is using a high-level language, such as Pascal or Ada, very little of the architecture of the underlying machine is visible.
One boundary where the computer designer and the computer programmer can view the same machine is the machine instruction set. From the designer’s point of view, the machine instruction set provides the functional requirements for the processor: implementing the processor is a task that in large part involves imple- menting the machine instruction set. The user who chooses to program in machine language (actually, in assembly language; see Appendix B) becomes aware of the register and memory structure, the types of data directly supported by the machine, and the functioning of the ALU. A description of a computer’s machine instruction set goes a long way toward explaining the computer’s processor.
Accordingly, we focus on machine instructions in this chapter and the next.1 MACHINE INSTRUCTION CHARACTERISTICS The operation of the processor is determined by the instructions it executes, referred to as machine instructions or computer instructions. The collection of dif- ferent instructions that the processor can execute is referred to as the processor’s instruction set. Elements of a Machine Instruction Each instruction must contain the information required by the processor for execu- tion.1, which repeats Figure 3.6, shows the steps involved in instruction execution and, by implication, defines the elements of a machine instruction. These elements are as follows: • Operation code: Specifies the operation to be performed (e.
The operation is specified by a binary code, known as the operation code, or opcode. • Source operand reference: The operation may involve one or more source operands, that is, operands that are inputs for the operation.1 / MACHINE INSTRUCTION CHARACTERISTICS 407 Instruction Operand Operand fetch fetch store Multiple Multiple operands results Instruction Instruction Operand Operand Data address operation address address operation calculation decoding calculation calculation Instruction complete, Return for string fetch next instruction or vector data Figure 12.1 Instruction Cycle State Diagram • Result operand reference: The operation may produce a result. • Next instruction reference: This tells the processor where to fetch the next instruction after the execution of this instruction is complete. The address of the next instruction to be fetched could be either a real address or a virtual address, depending on the architecture.
Generally, the distinction is transparent to the instruction set architecture. In most cases, the next instruction to be fetched immediately follows the current instruction. In those cases, there is no explicit reference to the next instruction. When an explicit reference is needed, then the main memory or virtual memory address must be supplied.
The form in which that address is supplied is discussed in Chapter 13. Source and result operands can be in one of four areas: • Main or virtual memory: As with next instruction references, the main or vir- tual memory address must be supplied. • Processor register: With rare exceptions, a processor contains one or more registers that may be referenced by machine instructions. If only one register exists, reference to it may be implicit.
If more than one register exists, then each register is assigned a unique name or number, and the instruction must contain the number of the desired register. • Immediate: The value of the operand is contained in a field in the instruction being executed. • I/O device: The instruction must specify the I/O module and device for the operation. If memory-mapped I/O is used, this is just another main or virtual memory address.
Instruction Representation Within the computer, each instruction is represented by a sequence of bits. The instruction is divided into fields, corresponding to the constituent elements of the 408 CHAPTER 12 / INSTRUCTION SETS: CHARACTERISTICS AND FUNCTIONS 4 Bits 6 Bits 6 Bits Opcode Operand reference Operand reference 16 Bits Figure 12.2 A Simple Instruction Format instruction. A simple example of an instruction format is shown in Figure 12. As another example, the IAS instruction format is shown in Figure 2.
With most instruction sets, more than one format is used. During instruction execution, an instruction is read into an instruction register (IR) in the processor. The processor must be able to extract the data from the various instruction fields to perform the required operation. It is difficult for both the programmer and the reader of textbooks to deal with binary representations of machine instructions.
Thus, it has become common prac- tice to use a symbolic representation of machine instructions. An example of this was used for the IAS instruction set, in Table 2. Opcodes are represented by abbreviations, called mnemonics, that indicate the operation. Common examples include ADD Add SUB Subtract MUL Multiply DIV Divide LOAD Load data from memory STOR Store data to memory Operands are also represented symbolically.
For example, the instruction ADD R, Y may mean add the value contained in data location Y to the contents of register R. In this example, Y refers to the address of a location in memory, and R refers to a particular register. Note that the operation is performed on the contents of a loca- tion, not on its address. Thus, it is possible to write a machine-language program in symbolic form.
Each symbolic opcode has a fixed binary representation, and the programmer speci- fies the location of each symbolic operand. For example, the programmer might begin with a list of definitions: X = 513 Y = 514 and so on. A simple program would accept this symbolic input, convert opcodes and operand references to binary form, and construct binary machine instructions. Machine-language programmers are rare to the point of nonexistence.
Most pro- grams today are written in a high-level language or, failing that, assembly language, which is discussed in Appendix B. However, symbolic machine language remains a useful tool for describing machine instructions, and we will use it for that purpose.1 / MACHINE INSTRUCTION CHARACTERISTICS 409 Instruction Types Consider a high-level language instruction that could be expressed in a language such as BASIC or FORTRAN. For example, X = X + Y This statement instructs the computer to add the value stored in Y to the value stored in X and put the result in X. How might this be accomplished with machine instructions? Let us assume that the variables X and Y correspond to locations 513 and 514.
If we assume a simple set of machine instructions, this operation could be accomplished with three instructions: 1. Load a register with the contents of memory location 513. Add the contents of memory location 514 to the register. Store the contents of the register in memory location 513.
As can be seen, the single BASIC instruction may require three machine instructions. This is typical of the relationship between a high-level language and a machine language. A high-level language expresses operations in a concise alge- braic form, using variables. A machine language expresses operations in a basic form involving the movement of data to or from registers.
With this simple example to guide us, let us consider the types of instructions that must be included in a practical computer. A computer should have a set of instructions that allows the user to formulate any data processing task. Another way to view it is to consider the capabilities of a high-level programming language. Any program written in a high-level language must be translated into machine language to be executed.
Thus, the set of machine instructions must be sufficient to express any of the instructions from a high-level language. With this in mind we can catego- rize instruction types as follows: • Data processing: Arithmetic and logic instructions • Data storage: Movement of data into or out of register and or memory locations • Data movement: I/O instructions • Control: Test and branch instructions Arithmetic instructions provide computational capabilities for processing numeric data. Logic (Boolean) instructions operate on the bits of a word as bits rather than as numbers; thus, they provide capabilities for processing any other type of data the user may wish to employ. These operations are performed primarily on data in processor registers.
Therefore, there must be memory instructions for mov- ing data between memory and the registers. I/O instructions are needed to transfer programs and data into memory and the results of computations back out to the user. Test instructions are used to test the value of a data word or the status of a computation. Branch instructions are then used to branch to a different set of instructions depending on the decision made.
We will examine the various types of instructions in greater detail later in this chapter. 410 CHAPTER 12 / INSTRUCTION SETS: CHARACTERISTICS AND FUNCTIONS Number of Addresses One of the traditional ways of describing processor architecture is in terms of the number of addresses contained in each instruction. This dimension has become less significant with the increasing complexity of processor design. Nevertheless, it is useful at this point to draw and analyze this distinction.
What is the maximum number of addresses one might need in an instruc- tion? Evidently, arithmetic and logic instructions will require the most operands. Virtually all arithmetic and logic operations are either unary (one source operand) or binary (two source operands). Thus, we would need a maximum of two addresses to reference source operands. The result of an operation must be stored, suggesting a third address, which defines a destination operand.
Finally, after completion of an instruction, the next instruction must be fetched, and its address is needed. This line of reasoning suggests that an instruction could plausibly be required to contain four address references: two source operands, one destination operand, and the address of the next instruction. In most architectures, most instructions have one, two, or three operand addresses, with the address of the next instruction being implicit (obtained from the program counter). Most architectures also have a few special-purpose instructions with more operands.
For example, the load and store multiple instructions of the ARM architecture, described in Chapter 13, designate up to 17 register operands in a single instruction.3 compares typical one-, two-, and three-address instructions that could be used to compute Y = (A - B)>[C + (D * E)]. With three addresses, each instruction specifies two source operand locations and a destination operand location. Because we choose not to alter the value of any of the operand locations, a temporary location, T, is used to store some intermediate results. Note that there are four instructions and that the original expression had five operands.