MINISTRY OF EDUCATION AND TRAINING HO CHI MINH CITY UNIVERSITY OF TECHNOLOGY AND EDUCATION GRADUATION THESIS MAJOR: COMPUTER ENGINEERING TECHNOLOGY DESIGN SIMULATION AND LAYOUT ANALYSIS OF 6T SRAM CIRCUIT USING TSMC 16NM TECHNOLOGY WITH SYNOPSYS TOOLS INSTRUCTOR: PHAM VAN KHOA STUDENT: NGUYEN THI LAM TRUC Ho Chi Minh city, July 2024 HO CHI MINH CITY UNIVERSITY OF TECHNOLOGY AND EDUCATION FACULTY OF INTERNATIONAL EDUCATION GRADUATION PROJECT DESIGN SIMULATION AND LAYOUT ANALYSIS OF 6T SRAM CIRCUIT USING TSMC 16NM TECHNOLOGY WITH SYNOPSYS TOOLS NGUYEN THI LAM TRUC Student ID: 20119172 Major: COMPUTER ENGINEERING TECHNOLOGY Advisor: PHAM VAN KHOA PhD. Ho Chi Minh City, July 2024 HO CHI MINH CITY UNIVERSITY OF TECHNOLOGY AND EDUCATION FACULTY OF INTERNATIONAL EDUCATION GRADUATION PROJECT DESIGN SIMULATION AND LAYOUT ANALYSIS OF 6T SRAM CIRCUIT USING TSMC 16NM TECHNOLOGY WITH SYNOPSYS TOOLS NGUYEN THI LAM TRUC Student ID: 20119172 Major: COMPUTER ENGINEERING TECHNOLOGY Advisor: PHAM VAN KHOA PhD. Ho Chi Minh City, July 2024 THE SOCIALIST REPUBLIC OF VIETNAM Independence – Freedom– Happiness -------- Ho Chi Minh City, , 2024 GRADUATION PROJECT ASSIGNMENT Student name: Nguyen Thi Lam Truc Student ID: 20119172 Major: Computer Engineering Technology Class: 20119CLA5 Advisor: Pham Van Khoa Phone number: 0918004457 Date of assignment: _____________________ Date of submission: _____________ 1. Project title: Design simulation and layout analysis of 6T SRAM circuit using TSMC 16nm technology with Synopsys tools 2.
Initial materials provided by the advisor: ___________________________________ 3. Content of the project: _________________________________________________ 4. Final product: ________________________________________________________ CHAIR OF THE PROGRAM ADVISOR (Sign with full name) (Sign with full name) THE SOCIALIST REPUBLIC OF VIETNAM Independence – Freedom– Happiness -------- Ho Chi Minh City, , 2024 ADVISOR’S EVALUATION SHEET Student name: Nguyen Thi Lam Truc. Major: Computer Engineering Technology.
Project title: DESIGN SIMULATION AND LAYOUT ANALYSIS OF 6T SRAM CIRCUIT USING TSMC 16NM TECHNOLOGY WITH SYNOPSYS TOOLS. Advisor: Pham Van Khoa. Content of the project:. Approval for oral defense? (Approved or denied) .) Ho Chi Minh City, month day , year ADVISOR (Sign with full name) THE SOCIALIST REPUBLIC OF VIETNAM Independence – Freedom– Happiness -------- Ho Chi Minh City, July 03, 2024 PRE-DEFENSE EVALUATION SHEET Student name: Nguyen Thi Lam Truc Student ID: 20119172 Major: Computer Engineering Technology Project title: Design, simulation and layout analysis of 6T SRAM circuit using Synopsys tools Name of Reviewer: Pham Ngoc Son EVALUATION 1.
Content and workload of the project - The authors performed Schematic design, Layout design, pre-simulation and post-simulation of the 6T SRAM circuit. Strengths: - The authors presented the read and write operations of the 6T SRAM on the schematic and layout diagrams by the suitable tools. - The authors assessed power and delay at various frequencies. Weaknesses: - Some paragraphs and figures need to improve, help the readers more accessible.
- Skip design and simulation of the 6T SRAM by different technologies. Approval for oral defense? (Approved or denied) - Approved 5. Overall evaluation: (Excellent, Good, Fair, Poor) - Good.5 (in words: eight five) Ho Chi Minh City, July 03, 2024 REVIEWER (Sign with full name) Phạm Ngọc Sơn THE SOCIALIST REPUBLIC OF VIETNAM Independence – Freedom– Happiness -------- Ho Chi Minh City, , 2024 EVALUATION SHEET OF DEFENSE COMMITTEE MEMBER Student name: Nguyen Thi Lam Truc. Major: Computer Engineering Technology.
Project title: DESIGN SIMULATION AND LAYOUT ANALYSIS OF 6T SRAM CIRCUIT USING TSMC 16NM TECHNOLOGY WITH SYNOPSYS TOOLS. Name of Defense Committee Member:. Content and workload of the project .) Ho Chi Minh City, month day , year COMMITTEE MEMBER (Sign with full name) TRƯỜNG ĐẠI HỌC SƯ PHẠM KỸ THUẬT TP HCM CỘNG HÒA XÃ HỘI CHỦ NGHĨA VIỆT NAM KHOA ĐIỆN- ĐIỆN TỬ Độc Lập – Tự Do – Hạnh Phúc ********** Ngày … tháng…năm 20… THỐNG KÊ CÁC NỘI DUNG BỔ SUNG VÀ CHỈNH SỬA ĐỒ ÁN TỐT NGHIỆP Tên đề tài: Design simulation and layout analysis of 6T SRAM circuit using TSMC 16nm technology with Synopsys tools Tên sinh viên 1: Nguyễn Thị Lâm Trúc MSSV 1: 20119172 Chuyên ngành: CNKTMT Tên GVHD: Phạm Văn Khoa STT THÔNG TIN BỔ SUNG /CHỈNH SỬA TRANG (Ghi rõ mục tên bổ sung/chỉnh sửa những mục gì trong ĐATN) 1.2 Kết luận việc làm trên công nghệ 16nm (Bổ sung) 8 2.2 Thông số trên SRAM (bổ sung) 19 3.2 Hình ảnh và cách đặt tên (chỉnh sửa) 42-43 4.2 Thông số kết quả của dòng điện (chỉnh sửa) 43 5.2 Kết quả và phân tích phần công suất (chỉnh sửa) 44-46 GVHD ký tên f SV ký tên Nguyễn Thị Lâm Trúc TRƯỜNG ĐẠI HỌC SƯ PHẠM KỸ THUẬT TP HCM CỘNG HÒA XÃ HỘI CHỦ NGHĨA VIỆT NAM KHOA ĐÀO TẠO QUỐC TẾ Độc Lập – Tự Do – Hạnh Phúc ********** PHIẾU BỔ SUNG VÀ CHỈNH SỬA ĐỒ ÁN TỐT NGHIỆP Tên đề tài: Design simulation and layout analysis of 6T SRAM circuit using TSMC 16nm technology with Synopsys tools Tên sinh viên 1: Nguyễn Thị Lâm Trúc MSSV 1: 20119172 Chuyên ngành: CNKTMT Tên GVHD: Phạm Văn Khoa I. NỘI DUNG BỔ SUNG (Ghi rõ rõ nội dung bổ sung những mục trong ĐATN) STT Nội dung bổ sung Trang 1.
Bổ sung việc tại sao luận văn chỉ hạn chế ở việc dùng mỗi công 8 nghệ 16nm 2. Bổ sung việc thiết lập thông số pfin và nfin cho SRAM 19 3. NỘI DUNG CHỈNH SỬA (Ghi rõ nội dung chỉnh sửa những mục trong ĐATN) STT Nội dung sửa Trang 1. Chỉnh lại thông tin và tên hình ảnh của dòng điện 42-43 2.
Sửa lại kết quả của dòng điện theo hình ảnh 43 3. Sửa lại kết quả và phân tích công suất 44-46 …. HCM Ngày…Tháng…năm GIẢNG VIÊN HƯỚNG DẪN SINH VIÊN 1 (Ký tên, ghi rõ Họ và tên) Nguyễn Thị Lâm Trúc Declaration Project title: Design simulation and layout analysis of 6T SRAM circuit using TSMC 16nm technology with Synopsys tools. Advisor: Pham Van Khoa Student name: Nguyen Thi Lam Truc Student ID: 20119172 Class: 20119CLA5 Declaration “ I hereby declare that this project is entirely my own work and that all referenced information has been properly cited.
I have not copied or used any materials without proper attribution. The tools and technologies used do not include any confidential information. I understand that I will be held responsible for any violations of the above statements. ” Ho Chi Minh, July 2024 Student Nguyen Thi Lam Truc Acknowledgements I would like to express my deepest gratitude to my advisor, Van Khoa Pham, for his unwavering support and guidance throughout this project.
His expertise in the function of 6T SRAM and analysis has been invaluable. He patiently answered all my questions, provided essential information, and ensured that the project stayed on the right track. Without his mentorship and encouragement, this project would not have been possible. I would like to express my sincere gratitude to all the teachers at Ho Chi Minh City University of Technology and Education, and especially to all the teachers of the Computer Engineering Technology of the FACULTY OF INTERNATIONAL EDUCATION as well as the Training Faculty of International Education.
Who have provided me with knowledge from both general and specialized courses and have supported and helped throughout my study at the university. I would also like to extend my thanks to Synopsys for granting me the opportunity to use their tools, which were crucial for the success of this essay. Their resources and technology greatly facilitated my research and analysis, contributing significantly to the project's completion. Once again, I sincerely thank everyone who has helped and supported me over the past time.
Thanks and Regards, Nguyen Thi Lam Truc Abstract Electronic circuit design is pivotal in advancing technology, captivating engineers, researchers, and hobbyists alike. This essay explores semiconductor technology from 90nm to 3nm and beyond, focusing on integrated circuit complexities. Components like diodes, transistors, resistors, capacitors, and inductors enable circuit functionality, distinguishing analog circuits for continuous signals and digital circuits for binary data representation with distinct waveforms. The essay emphasizes Synopsys tools in designing 6T SRAM bit cells within TSMC 16nm technology, pivotal in modern electronic design automation.
It highlights SRAM's role in digital systems, detailing its manufacturing process, schematic design, and structural intricacies for memory storage. Advanced Electronic Design Automation (EDA) tools— Fusion Compiler, Custom Compiler, and PrimeTime—are essential for precise layout creation and analyzing metrics like power consumption and delay. These tools effectively address challenges posed by shrinking semiconductor nodes, ensuring efficient circuit design and technological innovation. Table of Figures.
List of Tables. List Of Abbreviations .6 Structure of an essay. 4 CHAPTER 2 LITERATURE REVIEW AND BACKGROUND .3 TSMC 16nm technology nodes .4 Read/Write function of 6T SRAM .4 Design Rule Check. 24 CHAPTER 3 DESIGN IMPLEMENTATION.
35 CHAPTER 4 PERFORMANCE ANALYSIS .1 Different between Pre-sim and Post-sim .2 Delay read/write and Power. 49 Table of Figures Figure 2. 2: IV characteristics of FinFET for an oxide thickness of two gates (m) 16 nm; (n) 17 nm; (o) 18 nm [6]. 3: Comparison of conductance of FinFET and MOSFET.
4: The SRAM structure theoretical [5]. 5: SRAM waveform of Read operation [5]. 6: SRAM waveform of Write operation [5]. 7: Custom Compiler GUI.
8: Custom WaveView GUI. 9: Pre-charge schematic circuit. 10: Write Driver schematic circuit. 11: Differential Sense Amplifiers schematic circuit.
12: 6T SRAM schematic circuit. 13: Cross section of different metal wire after fabrication [18]. 14: DRC Flow chart. 15: LVS Flow chart.
17: Extraction Flow chart. 1: Flow chart describe Pre-sim and Post-sim of 6T SRAM. 2: Schematic circuit for testing the function of 6T SRAM. 3: HSPICE format sample for Pre-sim.
4: Waveform of read/write function for 6T SRAM in Pre-sim mode. 5: 6T SRAM functional block - first layout designs. 6: 6T SRAM functional block - second layout designs. 7: Waveform of read/write function for 6T SRAM in Post-sim mode.
1: Waveform of Data out between Pre-sim and Post-sim modes. 2: BLB signal between Pre-sim and Post-sim modes. 3: BL signal between Pre-sim and Post-sim modes. 4: Delay read of Pre-sim.
5: Delay read of Post-sim – first layout design. 6: Delay read of Post-sim – second layout design. 7: Delay write of Pre-sim. 8: Delay write of Post-sim – first layout design.
9: Delay write of Post-sim – second layout design. 10: Current minimum value at 50MHz of Pre-sim. 11: Current minimum value at 50MHz of Post-sim – first layout design. 12: Current minimum value at 50MHz of Post-sim – second layout design.
13: Current minimum static value of Pre-sim. 14: Current minimum static value of Post-sim – first layout design. 15: Current minimum static value of Post-sim – second layout design. 44 List of Tables Table 2.
1: Layer using in Layout process. 45 List Of Abbreviations TSMC Taiwan Semiconductor Manufacturing Company SRAM Static Random-Access Memory EDA Electronic Design Automation FinFET Fin-Shaped Field-Effect Transistor DRC Design Rule Checking LVS Layout Versus Schematic SPF Standard Parasitic Format MOSFET Metal-Oxide-Semiconductor Field-Effect Transistor CMOS Complementary Metal-Oxide Semiconductor RNM Read Noise Margin WNM Write Noise Margin DRV Data Retention Voltage BL Bit Line BLB Bit Line Bar WL Word Line SE Sence Enable WE Write Enable SoC System-On-A-Chip CPU Central Processing Unit CHAPTER 1 INTRODUCTION 1.1 Problem Statement In the modern world electronic circuit design is an important and fascinating field. This topic is of interest to engineers, researchers and hobbyists alike. It covers everything from the development of semiconductor technology ranging from 90nm to 3nm and beyond to the complex design of integrated circuits.
Components used in electronic circuits include diodes, transistors , resistors , capacitors and inductors. These parts enable the passage of electric charges resulting in working circuits. Consistent voltage or current flows such as steady audio or video signals are handled by analog circuits.